From: Florian Fainelli <ffainelli@freebox.fr>
This register offset in the SDRAM controller is going to be used by BCM6345.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 0ed5230..6e803ac 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -734,6 +734,8 @@
#define SDRAM_CFG_BANK_SHIFT 13
#define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
+#define SDRAM_MBASE_REG 0xc
+
#define SDRAM_PRIO_REG 0x2C
#define SDRAM_PRIO_MIPS_SHIFT 29
#define SDRAM_PRIO_MIPS_MASK (1 << SDRAM_PRIO_MIPS_SHIFT)
--
1.7.4.1
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