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Re: [PATCH] MIPS: SMTC: Correct saving of CP0_STATUS

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] MIPS: SMTC: Correct saving of CP0_STATUS
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Date: Sat, 17 Sep 2011 03:23:15 +0200
Cc: David Daney <david.daney@cavium.com>, linux-mips@linux-mips.org, "Kevin D. Kissell" <kevink@paralogos.com>
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In-reply-to: <20110915160054.GA10622@linux-mips.org>
References: <20110829232029.GA15763@zapo> <4E5C2490.6040203@cavium.com> <20110915160054.GA10622@linux-mips.org>
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On Thu, Sep 15, 2011 at 06:00:54PM +0200, Ralf Baechle wrote:
> On Mon, Aug 29, 2011 at 04:45:20PM -0700, David Daney wrote:
> 
> > How about the attached completely untested one instead?
> 
> Applied.  I like it more than than Edgar's patch because of the better
> scheduling.

I agree, thanks!

BTW, in case anyone is intersted, it is now possible to boot malta
boards with SMP with the latest QEMU. The neat thing is that if you
debug the kernel with GDB, you'll see the different cores execution
contexts as differten threads and can singletep them individually.

You need a QEMU from latest git.

Cheers

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