| To: | "Kevin D. Kissell" <kevink@paralogos.com> |
|---|---|
| Subject: | Re: [PATCH] MIPS: SMTC: Correct saving of CP0_STATUS |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Wed, 14 Sep 2011 17:12:27 +0200 |
| Cc: | "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, David Daney <david.daney@cavium.com>, linux-mips@linux-mips.org |
| In-reply-to: | <4E5D15DD.2020201@paralogos.com> |
| References: | <20110829232029.GA15763@zapo> <4E5C2490.6040203@cavium.com> <4E5C26D4.3000906@paralogos.com> <4E5C2B62.9040007@cavium.com> <4E5C3060.70302@paralogos.com> <20110830111603.GB14243@edde.se.axis.com> <4E5D15DD.2020201@paralogos.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.21 (2010-09-15) |
On Tue, Aug 30, 2011 at 09:54:53AM -0700, Kevin D. Kissell wrote: > It could very well have been a QEMU issue. At the time, I did spend > a while staring at the diffs between the working and non-working > kernel sources and I was unable to spot anything obviously suspect. > > It makes me wonder, what is the state of SMTC kernels? Are they widely > > used and considered stable? > > Or is the SMP mode (1 TC per VPE) the common choice? > The virtual SMP mode is far more common. SMTC has the advantage > that it allows the maximum throughput to be extracted from a 34K > core - depending on the application/benchmark, the "sweet spot" > may be more than 2 concurrent threads - but it's less well maintained. Not to mention that SMTC was developed for a single 34K core. It has never been pimped up to support multi-core systems such as the 1004K which would add some considerable complexity. Ralf |
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