| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | MIPS:Octeon: mailbox_interrupt is not registered as per cpu |
| From: | SAURABH MALPANI <saurabh140585@gmail.com> |
| Date: | Fri, 2 Sep 2011 13:29:14 +0530 |
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mailbox_interrupt is not registered with IRQF_PERCPU but it is supposed to be percpu interrupt. Is that on purpose or a miss? I am porting some code from x86 to octeon which requires special handling for per cpu interrupts. void octeon_prepare_cpus(unsigned int max_cpus) { cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff); if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
"mailbox0", mailbox_interrupt)) { panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n"); } if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED,
"mailbox1", mailbox_interrupt)) { panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n"); } } Saurabh |
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