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Re: [PATCH 1/8] MIPS: lantiq: fix early printk

To: John Crispin <blogic@openwrt.org>
Subject: Re: [PATCH 1/8] MIPS: lantiq: fix early printk
From: Sergei Shtylyov <sshtylyov@mvista.com>
Date: Wed, 24 Aug 2011 13:15:27 +0400
Cc: Ralf Baechle <ralf@linux-mips.org>, Thomas Langer <thomas.langer@lantiq.com>, linux-mips@linux-mips.org
In-reply-to: <1314174704-15549-2-git-send-email-blogic@openwrt.org>
References: <1314174704-15549-1-git-send-email-blogic@openwrt.org> <1314174704-15549-2-git-send-email-blogic@openwrt.org>
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Hello.

On 24-08-2011 12:31, John Crispin wrote:

The code was using a 32bit write operation in the early_printk code. This
resulted in 3 zero bytes also being written to the serial port. Change the
memory access to 8bit.

Signed-off-by: Thomas Langer<thomas.langer@lantiq.com>
Signed-off-by: John Crispin<blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
---
  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    4 ++++
  arch/mips/lantiq/early_printk.c                    |   14 ++++++++------
  2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
index 8a3c6be..e6d1ca0 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -34,6 +34,10 @@
  #define LTQ_ASC1_BASE_ADDR    0x1E100C00
  #define LTQ_ASC_SIZE          0x400

+/* during early_printk no ioremap is possible
+   lets use KSEG1 instead  */

   The preferred style of multi-line comments is:

/*
 * bla
 * bla
 */

WBR, Sergei

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