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[PATCH] MIPS: Alchemy: db1200: disable cascade IRQ in handler

To: Linux-MIPS <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH] MIPS: Alchemy: db1200: disable cascade IRQ in handler
From: Manuel Lauss <manuel.lauss@googlemail.com>
Date: Fri, 12 Aug 2011 12:28:35 +0200
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
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Sender: linux-mips-bounce@linux-mips.org
Disable the cascade IRQ in the cascade handler.  This is required to
get the DB1300 working, and also gets rid of all spurious interrupts
previously observed on the DB1200; so Config[OD] can be disabled
again for better performance.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
---
 arch/mips/alchemy/devboards/bcsr.c         |    4 ++++
 arch/mips/alchemy/devboards/db1200/setup.c |    7 -------
 2 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/mips/alchemy/devboards/bcsr.c 
b/arch/mips/alchemy/devboards/bcsr.c
index 596ad00..463d2c4 100644
--- a/arch/mips/alchemy/devboards/bcsr.c
+++ b/arch/mips/alchemy/devboards/bcsr.c
@@ -89,8 +89,12 @@ static void bcsr_csc_handler(unsigned int irq, struct 
irq_desc *d)
 {
        unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
 
+       disable_irq_nosync(irq);
+
        for ( ; bisr; bisr &= bisr - 1)
                generic_handle_irq(bcsr_csc_base + __ffs(bisr));
+
+       enable_irq(irq);
 }
 
 /* NOTE: both the enable and mask bits must be cleared, otherwise the
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c 
b/arch/mips/alchemy/devboards/db1200/setup.c
index 1dac4f2..4a89800 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -23,13 +23,6 @@ void __init board_setup(void)
        unsigned long freq0, clksrc, div, pfc;
        unsigned short whoami;
 
-       /* Set Config[OD] (disable overlapping bus transaction):
-        * This gets rid of a _lot_ of spurious interrupts (especially
-        * wrt. IDE); but incurs ~10% performance hit in some
-        * cpu-bound applications.
-        */
-       set_c0_config(1 << 19);
-
        bcsr_init(DB1200_BCSR_PHYS_ADDR,
                  DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
 
-- 
1.7.6


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