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Re: [PATCH] MIPS: Netlogic: Minor fixes for XLR processors

To: Jayachandran C <jayachandranc@netlogicmicro.com>
Subject: Re: [PATCH] MIPS: Netlogic: Minor fixes for XLR processors
From: Sergei Shtylyov <sshtylyov@mvista.com>
Date: Sat, 30 Jul 2011 17:46:44 +0400
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
In-reply-to: <20110730110449.GA30043@jayachandranc.netlogicmicro.com>
References: <20110730110449.GA30043@jayachandranc.netlogicmicro.com>
Sender: linux-mips-bounce@linux-mips.org
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Hello.

On 30-07-2011 15:04, Jayachandran C wrote:

* Avoid unneeded cache flushes, XLR dcache is fully coherent across
   CPUs.
* add r4k_wait as the cpu_wait
* Move load address - the current value wastes space.

   This seems like a material for the whole 3 patches...

WBR, Sergei

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