linux-mips
[Top] [All Lists]

[RFC PATCH 0/2] MIPS: selectively eliminate plat_irq_dispatch

To: Linux-MIPS <linux-mips@linux-mips.org>
Subject: [RFC PATCH 0/2] MIPS: selectively eliminate plat_irq_dispatch
From: Manuel Lauss <manuel.lauss@googlemail.com>
Date: Fri, 29 Jul 2011 10:37:14 +0200
Cc: Ralf Baechle <ralf@linux-mips.org>, Manuel Lauss <manuel.lauss@googlemail.com>
Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=T48bn1aDa/TDwmxHtEvDu931yHFnROiONT8wNuzWBqE=; b=gQHVN5B0UUKOmcr0CJIivKOd5Sw2P8jeWv1sE4VQqcI5nOAHKG6aYwrmVuZQnLV5Sr ZbK6iQGHePBm1Zep81kvp5xOToFi3OUhpU19j/+oK/DOx5DEWqVBhiUUh1XYfbEDTrZT p2nUZhaNq0qbv30WE7tCfPVA7WhF7X624HMJo=
Sender: linux-mips-bounce@linux-mips.org
These 2 patches provide a means to eliminate plat_irq_dispatch() on platforms
that can do without it.

Patch #1 adds a new config symbol which, when set, calls a generic MIPS irq
  dispatcher.  All interrupts controllers hanging off these interrupts must
  be registered as chain handlers.

Patch #2 implements the above on Alchemy.

Tested on various DB1xxx boards, with and without the C0 timer.

Finally, all credits should go to Ralf as he suggested the idea to me.

Please share your comments,
        Manuel Lauss

Manuel Lauss (2):
  MIPS: add option to the rid of plat_irq_dispatch
  MIPS: Alchemy: make ICs chained handler of MIPS ints.

 arch/mips/Kconfig              |    4 +++
 arch/mips/alchemy/common/irq.c |   55 ++++++++++++++--------------------------
 arch/mips/kernel/genex.S       |    4 +++
 arch/mips/kernel/irq_cpu.c     |    7 +++++
 4 files changed, 34 insertions(+), 36 deletions(-)

-- 
1.7.6


<Prev in Thread] Current Thread [Next in Thread>