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Re: [PATCH 10/11] MIPS: BCM63XX: add external irq support for non 6348 C

To: Maxime Bizon <mbizon@freebox.fr>
Subject: Re: [PATCH 10/11] MIPS: BCM63XX: add external irq support for non 6348 CPUs.
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Thu, 16 Jun 2011 10:51:55 +0200
Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, florian@openwrt.org
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In-reply-to: <1307742441-28284-11-git-send-email-mbizon@freebox.fr>
References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> <1307742441-28284-11-git-send-email-mbizon@freebox.fr>
Sender: linux-mips-bounce@linux-mips.org
Hi,

On 10 June 2011 23:47, Maxime Bizon <mbizon@freebox.fr> wrote:
> diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h 
> b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
> index 4354be1..0fa613c 100644
> --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
> +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
> @@ -104,12 +104,22 @@
>
>  /* External Interrupt Configuration register */
>  #define PERF_EXTIRQ_CFG_REG            0x14
> +
> +/* for 6348 only */
> +#define EXTIRQ_CFG_SENSE_6348(x)       (1 << (x))
> +#define EXTIRQ_CFG_STAT_6348(x)                (1 << (x + 5))
> +#define EXTIRQ_CFG_CLEAR_6348(x)       (1 << (x + 10))
> +#define EXTIRQ_CFG_MASK_6348(x)                (1 << (x + 15))
> +#define EXTIRQ_CFG_BOTHEDGE_6348(x)    (1 << (x + 20))
> +#define EXTIRQ_CFG_LEVELSENSE_6348(x)  (1 << (x + 25))
> +
> +/* for all others */
>  #define EXTIRQ_CFG_SENSE(x)            (1 << (x))
> -#define EXTIRQ_CFG_STAT(x)             (1 << (x + 5))
> -#define EXTIRQ_CFG_CLEAR(x)            (1 << (x + 10))
> -#define EXTIRQ_CFG_MASK(x)             (1 << (x + 15))
> -#define EXTIRQ_CFG_BOTHEDGE(x)         (1 << (x + 20))
> -#define EXTIRQ_CFG_LEVELSENSE(x)       (1 << (x + 25))
> +#define EXTIRQ_CFG_STAT(x)             (1 << (x + 4))
> +#define EXTIRQ_CFG_CLEAR(x)            (1 << (x + 8))
> +#define EXTIRQ_CFG_MASK(x)             (1 << (x + 12))
> +#define EXTIRQ_CFG_BOTHEDGE(x)         (1 << (x + 16))
> +#define EXTIRQ_CFG_LEVELSENSE(x)       (1 << (x + 20))
>
>  #define EXTIRQ_CFG_CLEAR_ALL           (0xf << 10)
>  #define EXTIRQ_CFG_MASK_ALL            (0xf << 15)

These two are still based on the 6348 definition, you should also add
these for non 6348 SoCs.
<http://lxr.linux.no/#linux+v2.6.39/arch/mips/bcm63xx/setup.c#L64>,
where these get used, needs also to be changed to then use the
appropriate one.


Jonas

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