| To: | ralf@linux-mips.org |
|---|---|
| Subject: | [PATCH 01/11] MIPS: BCM63XX: set default pci cache line size. |
| From: | Maxime Bizon <mbizon@freebox.fr> |
| Date: | Fri, 10 Jun 2011 23:47:11 +0200 |
| Cc: | linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon <mbizon@freebox.fr> |
| In-reply-to: | <1307742441-28284-1-git-send-email-mbizon@freebox.fr> |
| References: | <1307742441-28284-1-git-send-email-mbizon@freebox.fr> |
| Sender: | linux-mips-bounce@linux-mips.org |
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
---
arch/mips/pci/pci-bcm63xx.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/mips/pci/pci-bcm63xx.c b/arch/mips/pci/pci-bcm63xx.c
index 82e0fde..c7fc92f 100644
--- a/arch/mips/pci/pci-bcm63xx.c
+++ b/arch/mips/pci/pci-bcm63xx.c
@@ -215,6 +215,8 @@ static int __init bcm63xx_pci_init(void)
register_pci_controller(&bcm63xx_cb_controller);
#endif
+ pci_cache_line_size = 4;
+
/* mark memory space used for IO mapping as reserved */
request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE,
"bcm63xx PCI IO space");
--
1.7.1.1
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