[PATCH 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU.

To:	ralf@linux-mips.org
Subject:	[PATCH 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU.
From:	Maxime Bizon <mbizon@freebox.fr>
Date:	Fri, 10 Jun 2011 23:47:10 +0200
Cc:	linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon <mbizon@freebox.fr>
Sender:	linux-mips-bounce@linux-mips.org

To:

ralf@linux-mips.org

Subject:

[PATCH 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU.

From:

Maxime Bizon <mbizon@freebox.fr>

Date:

Fri, 10 Jun 2011 23:47:10 +0200

Cc:

linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon <mbizon@freebox.fr>

Sender:

linux-mips-bounce@linux-mips.org

These patches add support for 6368 CPU to the existing bcm63xx code.

Basic CPU support for now, ethernet and board support will come soon.


Maxime Bizon (11):
  MIPS: BCM63XX: set default pci cache line size.
  MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers
    remapping.
  MIPS: BCM63XX: call board_register_device from device_initcall()
  MIPS: BCM63XX: introduce bcm_readll & bcm_writell.
  MIPS: BCM63XX: cleanup cpu registers.
  MIPS: BCM63XX: add more register sets & missing register definitions.
  MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity.
  MIPS: BCM63XX: prepare irq code to handle different external irq
    hardware implementation.
  MIPS: BCM63XX: handle 64 bits irq stat register in irq code.
  MIPS: BCM63XX: add external irq support for non 6348 CPUs.
  MIPS: BCM63XX: add support for bcm6368 CPU.

 arch/mips/bcm63xx/Kconfig                         |    4 +
 arch/mips/bcm63xx/clk.c                           |   70 +++-
 arch/mips/bcm63xx/cpu.c                           |  221 +++------
 arch/mips/bcm63xx/dev-uart.c                      |    2 +-
 arch/mips/bcm63xx/irq.c                           |  321 ++++++++++--
 arch/mips/bcm63xx/prom.c                          |    7 +-
 arch/mips/bcm63xx/setup.c                         |    2 +-
 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |  593 +++++++++++++--------
 arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h |    2 +
 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h   |    2 +
 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  213 +++++++-
 arch/mips/include/asm/mach-bcm63xx/ioremap.h      |   42 ++
 arch/mips/pci/pci-bcm63xx.c                       |    6 +-
 13 files changed, 1065 insertions(+), 420 deletions(-)
 create mode 100644 arch/mips/include/asm/mach-bcm63xx/ioremap.h

<Prev in Thread]	Current Thread	[Next in Thread>
[PATCH 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU., Maxime Bizon <= [PATCH 02/11] MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers remapping., Maxime Bizon [PATCH 01/11] MIPS: BCM63XX: set default pci cache line size., Maxime Bizon [PATCH 03/11] MIPS: BCM63XX: call board_register_device from device_initcall(), Maxime Bizon [PATCH 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell., Maxime Bizon [PATCH 06/11] MIPS: BCM63XX: add more register sets & missing register definitions., Maxime Bizon Re: [PATCH 06/11] MIPS: BCM63XX: add more register sets & missing register definitions., Jonas Gorski [PATCH 07/11] MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity., Maxime Bizon Re: [PATCH 07/11] MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity., Jonas Gorski [PATCH 09/11] MIPS: BCM63XX: handle 64 bits irq stat register in irq code., Maxime Bizon [PATCH 05/11] MIPS: BCM63XX: cleanup cpu registers., Maxime Bizon

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