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***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS

To: Ralf Baechle <ralf@linux-mips.org>
Subject: ***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS
From: Gabor Juhos <juhosg@openwrt.org>
Date: Sun, 5 Jun 2011 20:49:25 +0200
Cc: linux-mips@linux-mips.org, Gabor Juhos <juhosg@openwrt.org>
Sender: linux-mips-bounce@linux-mips.org
The status register of the miscellaneous interrupt controller
is 32 bits wide, but the actual value of NR_IRQS covers only 8
of them. Increase NR_IRQS in order to make all of those interrupt
lines usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
 arch/mips/include/asm/mach-ath79/irq.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/include/asm/mach-ath79/irq.h 
b/arch/mips/include/asm/mach-ath79/irq.h
index 189bc6e..cffbeab 100644
--- a/arch/mips/include/asm/mach-ath79/irq.h
+++ b/arch/mips/include/asm/mach-ath79/irq.h
@@ -10,10 +10,10 @@
 #define __ASM_MACH_ATH79_IRQ_H
 
 #define MIPS_CPU_IRQ_BASE      0
-#define NR_IRQS                        16
+#define NR_IRQS                        40
 
 #define ATH79_MISC_IRQ_BASE    8
-#define ATH79_MISC_IRQ_COUNT   8
+#define ATH79_MISC_IRQ_COUNT   32
 
 #define ATH79_CPU_IRQ_IP2      (MIPS_CPU_IRQ_BASE + 2)
 #define ATH79_CPU_IRQ_USB      (MIPS_CPU_IRQ_BASE + 3)
-- 
1.7.2.1


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