| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: flush_kernel_vmap_range() invalidate_kernel_vmap_range() API not exists for MIPS |
| From: | naveen yadav <yad.naveen@gmail.com> |
| Date: | Thu, 19 May 2011 10:05:45 +0530 |
| Cc: | linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Christoph Hellwig <hch@lst.de> |
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| In-reply-to: | <AANLkTimy6FPdgW=f8HOTBd6ORKmjvX3KFONXesacJ6Ms@mail.gmail.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <AANLkTimkh2QLvupu+62NGrKfqRb_gC7KLCAKkEoS9N9N@mail.gmail.com> <20110325172709.GC8483@linux-mips.org> <AANLkTimy6FPdgW=f8HOTBd6ORKmjvX3KFONXesacJ6Ms@mail.gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
Hi Ralf, Have you got time to look into this issue. Regards On Tue, Mar 29, 2011 at 11:24 AM, naveen yadav <yad.naveen@gmail.com> wrote: > I am sorry, Yes they are VIPT, > > > On Fri, Mar 25, 2011 at 10:57 PM, Ralf Baechle <ralf@linux-mips.org> wrote: >> On Fri, Mar 25, 2011 at 02:38:13PM +0530, naveen yadav wrote: >> >>> We are working on 2.6.35.9 linux kernel on MIPS 34kce core and our >>> cache is VIVT having cache aliasing . >> >> No, they're VIPT unless you successfully modified your 34K core to >> change it from a less than perfect cache design to the most lunatic >> cache policy known to man kind ... >> >>> When I check the implementation on ARM I can check the implemenation >>> exists , but there is not similar implementation exists on MIPS. >>> These API's are used by XFS module: >>> >>> static inline void flush_kernel_vmap_range(void *vaddr, int size) >>> static inline void invalidate_kernel_vmap_range(void *vaddr, int size) >>> static inline void flush_kernel_dcache_page(struct page *page) >> >> A known problem for (too ...) long. I'll finally take care of it. >> >> Ralf >> > |
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