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[patch 15/38] mips: gt641: Convert to new irq_chip functions

To: linux-mips@linux-mips.org
Subject: [patch 15/38] mips: gt641: Convert to new irq_chip functions
From: Thomas Gleixner <tglx@linutronix.de>
Date: Wed, 23 Mar 2011 21:08:59 -0000
Cc: Ralf Baechle <ralf@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20110323210437.398062704@linutronix.de>
Sender: linux-mips-bounce@linux-mips.org
User-agent: quilt/0.48-1
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/mips/kernel/irq-gt641xx.c |   26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

Index: linux-mips-next/arch/mips/kernel/irq-gt641xx.c
===================================================================
--- linux-mips-next.orig/arch/mips/kernel/irq-gt641xx.c
+++ linux-mips-next/arch/mips/kernel/irq-gt641xx.c
@@ -29,64 +29,64 @@
 
 static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock);
 
-static void ack_gt641xx_irq(unsigned int irq)
+static void ack_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 cause;
 
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        cause = GT_READ(GT_INTRCAUSE_OFS);
-       cause &= ~GT641XX_IRQ_TO_BIT(irq);
+       cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRCAUSE_OFS, cause);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
 
-static void mask_gt641xx_irq(unsigned int irq)
+static void mask_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 mask;
 
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        mask = GT_READ(GT_INTRMASK_OFS);
-       mask &= ~GT641XX_IRQ_TO_BIT(irq);
+       mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRMASK_OFS, mask);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
 
-static void mask_ack_gt641xx_irq(unsigned int irq)
+static void mask_ack_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 cause, mask;
 
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        mask = GT_READ(GT_INTRMASK_OFS);
-       mask &= ~GT641XX_IRQ_TO_BIT(irq);
+       mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRMASK_OFS, mask);
 
        cause = GT_READ(GT_INTRCAUSE_OFS);
-       cause &= ~GT641XX_IRQ_TO_BIT(irq);
+       cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRCAUSE_OFS, cause);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
 
-static void unmask_gt641xx_irq(unsigned int irq)
+static void unmask_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 mask;
 
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        mask = GT_READ(GT_INTRMASK_OFS);
-       mask |= GT641XX_IRQ_TO_BIT(irq);
+       mask |= GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRMASK_OFS, mask);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
 
 static struct irq_chip gt641xx_irq_chip = {
        .name           = "GT641xx",
-       .ack            = ack_gt641xx_irq,
-       .mask           = mask_gt641xx_irq,
-       .mask_ack       = mask_ack_gt641xx_irq,
-       .unmask         = unmask_gt641xx_irq,
+       .irq_ack        = ack_gt641xx_irq,
+       .irq_mask       = mask_gt641xx_irq,
+       .irq_mask_ack   = mask_ack_gt641xx_irq,
+       .irq_unmask     = unmask_gt641xx_irq,
 };
 
 void gt641xx_irq_dispatch(void)



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