Re: Problem About Vectored interrupt

["Dennis.Yxun" <dennis.yxun@gmail.com>]

HI ALL:
  Again, found that when come to set vect irq 7, do additional data flush fix my problem, here is the patch

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e971043..850ce58 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1451,6 +1451,9 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
                *w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff);
                w = (u32 *)(b + ori_offset);
                *w = (*w & 0xffff0000) | ((u32)handler & 0xffff);
+               /* FIXME: need flash data cache, for timer irq */
+               if (n == 7)
+                       flush_data_cache_page((unsigned int)b);
                local_flush_icache_range((unsigned long)b,
                                         (unsigned long)(b+handler_len));
        }



Dennis

On Mon, Dec 27, 2010 at 11:56 PM, Dennis.Yxun <dennis.yxun@gmail.com> wrote:

HI Annop:

  Thanks for your reply.

  Actually, I think I've already done those two point

you mentioned here.

  I checked my .config file, it include

  CONFIG_CEVT_R4K_LIB=y

  CONFIG_CEVT_R4K=y

  CONFIG_CSRC_R4K_LIB=y

  CONFIG_CSRC_R4K=y

for the get_c0_compare_int

I've already implemented, see my attached time.c

unsigned int __cpuinit get_c0_compare_int(void)

{

        if (cpu_has_vint)

                set_vi_handler(cp0_compare_irq, mips_timer_dispatch0);

        mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;

        return mips_cpu_timer_irq;

}

c0_compare_irq = 7

and MIPS_CPU_IRQ_BASE = 0

so mips_cpu_timer_irq = 7

should be the same as your mail

Dennis

On Mon, Dec 27, 2010 at 11:20 PM, Anoop P.A. <Anoop_P.A@pmc-sierra.com> wrote:

Hi Dennis,

You may not have to do this ugly hack. Since your cpu is 24kc you should be able to re-use r4k timer library. Select r4k timer from your Kconfig
[code]
       select CEVT_R4K
       select CSRC_R4K

To point your timer interrupt you can add get_c0_compare_int function to your platform init code

[code]

unsigned int __cpuinit get_c0_compare_int(void)
{
return 7;
}

Thanks
Anoop


________________________________

From: linux-mips-bounce@linux-mips.org on behalf of Dennis.Yxun
Sent: Mon 12/27/2010 7:30 PM
To: linux-mips@linux-mips.org
Subject: Re: Problem About Vectored interrupt

HI:
  Here is my patch which hacked set_vi_srs_handler, with this I could successfully bring timer(compare/counter),
  But I still not reach the root problem,
Could someone shine some lights on me.
  Thanks

Dennis


On Mon, Dec 27, 2010 at 4:40 PM, Dennis.Yxun <dennis.yxun@gmail.com> wrote:


       HI ALL:
           I'm try to porting kernel-2.6.36 to one mips24kc board, seems it can't bind vectored irq 7 to timer interrupt.
       The hardware wired IP7 to timer interrupt (CP0 compare/counter interrupt)
           I implemented my own time.c, use set_vi_handler to map cp0_compare_irq(value: 7) to mips_timer_dispatch,
        but weird problem, it didn't successfully map to mips_timer_dispatch, but print out "Caught unexpected vectored interrupt."
       which means it still use " static asmlinkage void do_default_vi(void)"  [1]

          My question is : why first call to "set_vi_srs_handler" successfully mapped to vectored irq7 [2]
       but later is fail[3], see my attached file, bad_kernel.txt

       Dennis


       [1] arch/mips/kernel/traps.c 1339
       [2] arch/mips/kernel/traps.c  1436, when addr == NULL
       [3] my attached file time.c get_c0_compare_int