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Re: [PATCH V2 06/10] MIPS: lantiq: add NOR flash support

To: John Crispin <>
Subject: Re: [PATCH V2 06/10] MIPS: lantiq: add NOR flash support
From: Artem Bityutskiy <>
Date: Mon, 07 Mar 2011 10:58:40 +0200
Cc: Ralf Baechle <>,, Ralph Hempel <>,, Daniel Schwierzeck <>, David Woodhouse <>
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In-reply-to: <>
Original-recipient: rfc822;
References: <> <>
On Tue, 2011-03-01 at 17:13 +0100, John Crispin wrote:
> NOR flash is attached to the same EBU (External Bus Unit) as PCI. As described
> in the PCI patch, the EBU is a little buggy, resulting in the upper and lower
> 16 bit of the data on a 32 bit read are swapped. (essentially we have a 
> addr^=2)
> To work around this we do a addr^=2 during the probe. Once probed we adapt
> cfi->addr_unlock1 and cfi->addr_unlock2 to represent the endianess bug.
> Changes in V2
> * handle the endianess bug inside the map code and not in the generic cfi code
> * remove the addr swizzle patch
> Signed-off-by: John Crispin <>
> Signed-off-by: Ralph Hempel <>
> Cc: David Woodhouse <>
> Cc: Daniel Schwierzeck <>
> Cc:
> Cc:

There are a couple warnings, would you please address them
and resend?

Best Regards,
Artem Bityutskiy (Артём Битюцкий)

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