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Re: [PATCH V3 06/10] MIPS: lantiq: add NOR flash support

To: Sergei Shtylyov <sshtylyov@mvista.com>
Subject: Re: [PATCH V3 06/10] MIPS: lantiq: add NOR flash support
From: John Crispin <blogic@openwrt.org>
Date: Fri, 04 Mar 2011 21:13:00 +0100
Cc: Ralf Baechle <ralf@linux-mips.org>, Ralph Hempel <ralph.hempel@lantiq.com>, David Woodhouse <dwmw2@infradead.org>, Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>, linux-mips@linux-mips.org, linux-mtd@lists.infradead.org
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Hi,

>> +    if (ltq_mtd_probing)
>> +        adr ^= 2;
>> +    spin_lock_irqsave(&ebu_lock, flags);
>> +    temp.x[0] = *((__u16 *)(map->virt + adr));
>> +    spin_unlock_irqrestore(&ebu_lock, flags);
>
>    Hm, what does this lock gain, if the read is atomic anyway?

the SoC has a hardware arbitor for the EBU. I have so far not been able
to activate it properly and the lock is needed to protect from PCI and
NOR i/o clashing with eachother. i know that the arbitor works when
using lantiqs 2.6.28. i will provide a follow up patch once i figured
how to bring up the arbitor properly. until that time we need to use the
lock.

thanks,
John

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