| To: | Sergei Shtylyov <sshtylyov@mvista.com> |
|---|---|
| Subject: | Re: [PATCH V3 06/10] MIPS: lantiq: add NOR flash support |
| From: | John Crispin <blogic@openwrt.org> |
| Date: | Fri, 04 Mar 2011 21:13:00 +0100 |
| Cc: | Ralf Baechle <ralf@linux-mips.org>, Ralph Hempel <ralph.hempel@lantiq.com>, David Woodhouse <dwmw2@infradead.org>, Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>, linux-mips@linux-mips.org, linux-mtd@lists.infradead.org |
| In-reply-to: | <4D70DDEA.2050308@mvista.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1299146626-17428-1-git-send-email-blogic@openwrt.org> <1299146626-17428-7-git-send-email-blogic@openwrt.org> <4D70DDEA.2050308@mvista.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.12) Gecko/20100913 Icedove/3.0.7 |
Hi, >> + if (ltq_mtd_probing) >> + adr ^= 2; >> + spin_lock_irqsave(&ebu_lock, flags); >> + temp.x[0] = *((__u16 *)(map->virt + adr)); >> + spin_unlock_irqrestore(&ebu_lock, flags); > > Hm, what does this lock gain, if the read is atomic anyway? the SoC has a hardware arbitor for the EBU. I have so far not been able to activate it properly and the lock is needed to protect from PCI and NOR i/o clashing with eachother. i know that the arbitor works when using lantiqs 2.6.28. i will provide a follow up patch once i figured how to bring up the arbitor properly. until that time we need to use the lock. thanks, John |
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