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Re: SMTC support status in latest git head.

To: "Kevin D. Kissell" <kevink@paralogos.com>
Subject: Re: SMTC support status in latest git head.
From: Anoop P A <anoop.pa@gmail.com>
Date: Fri, 07 Jan 2011 13:26:59 +0530
Cc: STUART VENTERS <stuart.venters@adtran.com>, "Anoop P.A." <Anoop_P.A@pmc-sierra.com>, linux-mips@linux-mips.org
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On Thu, 2011-01-06 at 15:31 -0800, Kevin D. Kissell wrote:
> On 01/06/11 12:23, Anoop P A wrote:

> 
> I'm sure I've said this before, and it's in various comments in the SMTC
> code, but remember, one of the main problems that the SMTC kernel
> had to solve was to prevent all TCs of a VPE from "convoying" after every
> interrupt.  The way this is done is that the interrupt vector code, before
> clearing EXL, masks off the Status.IM bit associated with the incoming
> interrupt.  Of course, to get another interrupt from the same source
> (or collection of sources), that IM bit needs to be restored.  The "correct"
> mechanism for this is by having the appropriate irq_hwmask[] value set,
> so that smtc_im_ack_irq(), which should be invoked on an irq "ack()"
> (meaning that the source has been quenched and any new occurrence
> should be considered a new interrupt), will restore the bit in Status.
> This function got moved around a bit in the various SMTC prototypes,
> but it proved least intrusive to put it into the xxx_mask_and_ack() 
> functions
> for the interrupt controllers - see irq-msc01.c and i8259.c.  If you haven't
> done the same in any equivalent code for a different on-chip controller,
> you'll definitely have problems.
> 
> The Backstop scheme works OK for peripheral interrupts that didn't
> have an appropriate irq_hwmask[] value set up, but clock interrupts
> don't follow the same code paths and can't depend on the backstop.

Ok. Well thanks much for your detailed explanation. Well I hope I found
the root cause . smtc_clockevent_init() was overriding irq_hwmask even
if are using platform specific get_c0_compare_int. With following patch
everything seems to be working for me.
------------------------------------------------------------------------
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
index 2e72d30..a25fc59 100644
--- a/arch/mips/kernel/cevt-smtc.c
+++ b/arch/mips/kernel/cevt-smtc.c
@@ -310,9 +310,14 @@ int __cpuinit smtc_clockevent_init(void)
                return 0;
        /*
         * And we need the hwmask associated with the c0_compare
-        * vector to be initialized.
+        * vector to be initialized. However incase of platform 
+        * specific get_co_compare_int, don't override irq_hwmask
+        * expect platform code to set a valid mask value. 
         */
-       irq_hwmask[irq] = (0x100 << cp0_compare_irq);
+
+       if (!get_c0_compare_int)
+               irq_hwmask[irq] = (0x100 << cp0_compare_irq);
+
        if (cp0_timer_irq_installed)
                return 0;
----------------------------------------------------------------------- 


Attaching my msp_ir_cic.c . Kindly have a look if possible.

Thanks
Anoop

> 
>              Regards,
> 
>              Kevin K.

Attachment: msp_irq_cic.c
Description: Text Data

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