| To: | Gabor Juhos <juhosg@openwrt.org> |
|---|---|
| Subject: | Re: [PATCH v4 01/16] MIPS: add initial support for the Atheros AR71XX/AR724X/AR931X SoCs |
| From: | Florian Fainelli <florian@openwrt.org> |
| Date: | Sun, 2 Jan 2011 21:43:13 +0100 |
| Cc: | Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org, Imre Kaloz <kaloz@openwrt.org>, "Luis R. Rodriguez" <lrodriguez@atheros.com>, Cliff Holden <Cliff.Holden@atheros.com>, Kathy Giori <Kathy.Giori@atheros.com> |
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| In-reply-to: | <1293994589-6794-2-git-send-email-juhosg@openwrt.org> |
| Organization: | OpenWrt |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1293994589-6794-1-git-send-email-juhosg@openwrt.org> <1293994589-6794-2-git-send-email-juhosg@openwrt.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
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Hello,
On Sunday 02 January 2011 19:56:14 Gabor Juhos wrote:
> This patch adds initial support for various Atheros SoCs based on the
> MIPS 24Kc core. The following models are supported at the moment:
>
> - AR7130
> - AR7141
> - AR7161
> - AR9130
> - AR9132
> - AR7240
> - AR7241
> - AR7242
>
> The current patch contains minimal support only, but the resulting
> kernel can boot into user-space with using of an initramfs image on
> various boards which are using these SoCs. Support for more built-in
> devices and individual boards will be implemented in further patches.
>
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
> ---
> Changes since RFC:
> - the ATH79_DEV_UART Kconfig option is removed, and the URT platform
> code has been moved into dev-common[ch]
>
> Changes since v1:
> - ath79_device_{start,stop} has been renamed to
> ath79_device_reset_{set,clear} to to reflect the purpose of these
> functions better
> - some definitions has been moved from 'arch/mips/ath79/common.h' to
> 'arch/mips/include/asm/mach-ath79/ath79.h' to make them available for
> future drivers
> - rebased against 2.6.37-rc7
>
> Changes since v2:
> - don't use __init for function declarations
>
> Changes since v3:
> - rebase against 2.6.37-rc8
[snip]
> +
> +static DEFINE_SPINLOCK(ath79_device_reset_lock);
> +
> +u32 ath79_cpu_freq;
> +EXPORT_SYMBOL_GPL(ath79_cpu_freq);
> +
> +u32 ath79_ahb_freq;
> +EXPORT_SYMBOL_GPL(ath79_ahb_freq);
> +
> +u32 ath79_ddr_freq;
> +EXPORT_SYMBOL_GPL(ath79_ddr_freq);
Why not use the Clock API with fixed rates just like how it is done for AR7?
> +
> +enum ath79_soc_type ath79_soc;
> +
> +void __iomem *ath79_pll_base;
> +void __iomem *ath79_reset_base;
> +EXPORT_SYMBOL_GPL(ath79_reset_base);
> +void __iomem *ath79_ddr_base;
> +
[snip]
--
Florian
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