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Re: Can't read from mmaped PCI memory space

To: "tiejun.chen" <tiejun.chen@windriver.com>
Subject: Re: Can't read from mmaped PCI memory space
From: Wolfgang Grandegger <wg@grandegger.com>
Date: Mon, 13 Dec 2010 21:48:10 +0100
Cc: Linux-MIPS <linux-mips@linux-mips.org>
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On 11/29/2010 02:41 PM, Wolfgang Grandegger wrote:
> Hello,
> 
> I hit the send button too early, sorry...
> 
> On 11/29/2010 02:23 PM, Wolfgang Grandegger wrote:
>> On 11/29/2010 11:24 AM, tiejun.chen wrote:
>>> Wolfgang Grandegger wrote:
>>>> Hello,
>>>>
>>>> I'm trying to read from mmapped PCI memory space on an alchemy board,
>>>> but I can't get it to work. Here's the lspci output of the PCI card:
>>>>
>>>>   bash-3.00# lspci -v
>>>>   00:00.0 Class 0200: 168c:001b (rev 01)
>>>>    Subsystem: 168c:2063
>>>>    Flags: bus master, medium devsel, latency 168, IRQ 9
>>>>    Memory at 0000000040000000 (32-bit, non-prefetchable) [size=64K]
>>>>    Capabilities: [44] Power Management version 2
>>>>
>>>> I used mmap on "/dev/mem" and "/sys/bus/pci/.../resource0", but I do not
>>>> read the expected values using "*(volatile u32 *)mmap_addr" from that
>>>> region. The value also changes from read to read. Reading from kernel
>>>> space just work fine. Am I doing something illegal? Any idea why it does
>>>> not work?
>>>
>>> Form here I'm not sure how you did exactly.
>>>
>>> Theoretically, you can mmap() directly that at least from the sys resource. 
>>> But
>>> I think you have to notice the aligning requirement for a page. I means you
>>> should firstly map one given base_address & ~(PAGE_SIZE - 1). Then access 
>>> the
>>> last destination address with adding the corresponding offset as you want.
> 
> I'm aware of the alignment issue. Anyway, I'm mapping the above address,
> which is already aligned. It must be something else. I'm using the
> ath_info and devmem2 Program for testing.

It's an issue with 64-bit address mapping. Currently mmap tries to map
0x4000'0000 but the physical address of the PCI memory space on my CPU is
0x4'4000'0000. I wonder why this problem has not yet been discovered.
The attached patch below works for my board.

Wolfgang.

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