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Re: [RFC 3/3] VSMP support for MSP71xx family

To: Anoop P A <anoop.pa@gmail.com>
Subject: Re: [RFC 3/3] VSMP support for MSP71xx family
From: Sergei Shtylyov <sshtylyov@mvista.com>
Date: Thu, 02 Dec 2010 14:58:49 +0300
Cc: kevink@paralogos.com, linux-mips@linux-mips.org, David Howells <dhowells@redhat.com>, Ralf Baechle <ralf@linux-mips.org>
In-reply-to: <1291220637.31413.20.camel@paanoop1-desktop>
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Hello.

On 01-12-2010 19:23, Anoop P A wrote:

From 5bfd3ba210e521df2b493862446b4535bcdb0cdf Mon Sep 17 00:00:00 2001
Message-Id:
<5bfd3ba210e521df2b493862446b4535bcdb0cdf.1291219118.git.anoop.pa@gmail.com>
In-Reply-To:<cover.1291219118.git.anoop.pa@gmail.com>
References:<cover.1291219118.git.anoop.pa@gmail.com>
From: Anoop P A<anoop.pa@gmail.com>
Date: Wed, 1 Dec 2010 21:08:37 +0530
Subject: [RFC 3/3] VSMP support for MSP71xx family.
Cc: anoop.pa@gmail.com

Don't include this header please -- it will have to be edited out anyway when applying the patch.

followig

   Following.

patches

   Patches? I see only one.

setup vectored interrupt in msp_irq.c and
register vsmp_ops from msp_setup.c.
It also changes get_c0_compare_int to return corresponding vpe timer
interrupt.

Signed-off-by: Anoop P A<anoop.pa@gmail.com>
[...]

diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq.c
b/arch/mips/pmc-sierra/msp71xx/msp_irq.c
index 734d598..e9144c8 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq.c
[...]
@@ -29,6 +27,19 @@ extern void msp_slp_irq_dispatch(void);
  extern void msp_cic_irq_init(void);
  extern void msp_cic_irq_dispatch(void);

+/* VSMP support init */
+extern void msp_vsmp_int_init(void);
+
+/* vectored interrupt implementation */
+
+/* SW0/1 interrupts are used for SMP/SMTC */
+static inline void mac0_int_dispatch(void) { do_IRQ(MSP_INT_MAC0); }
+static inline void mac1_int_dispatch(void) { do_IRQ(MSP_INT_MAC1); }
+static inline void mac2_int_dispatch(void) { do_IRQ(MSP_INT_SAR); }

   You probably forgot a space here...

+static inline void usb_int_dispatch(void)  { do_IRQ(MSP_INT_USB);  }
+static inline void sec_int_dispatch(void)  { do_IRQ(MSP_INT_SEC);  }
+
+
  /*
   * The PMC-Sierra MSP interrupts are arranged in a 3 level cascaded
   * hierarchical system.  The first level are the direct MIPS interrupts
@@ -96,29 +107,51 @@ asmlinkage void plat_irq_dispatch(struct pt_regs
*regs)

   Your patch is line wrapped.

  void __init arch_init_irq(void)
  {
+       /* assume we'll be using vectored interrupt mode except in UP mode*/

   You forgot a spce before */.

        /* setup the 2nd-level SLP register based interrupt controller */
+       /* VSMP /SMTC support support is not enabled for SLP */

   The preferred style for the multiline comments is this:

/*
 * bla
 * bla
 */

WBR, Sergei

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