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Why do we have ebase located at some high memory address when we use Vec

To: <linux-mips@linux-mips.org>
Subject: Why do we have ebase located at some high memory address when we use Vectored Interrupts?
From: "Ardelean, Andrei" <Andrei.Ardelean@idt.com>
Date: Fri, 12 Nov 2010 10:53:02 -0800
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Thread-index: AcuCmtVspzOQ1PvOQLyjfo6oJCB30A==
Thread-topic: Why do we have ebase located at some high memory address when we use Vectored Interrupts?
Hi,

Why do we have ebase located at some high memory address when we use
Vectored Interrupts and for Compatible Mode we have the normal location
close to zero?

Thanks,
Andrei
 


.............................. in void __init trap_init(void):
        if (cpu_has_veic || cpu_has_vint) {
                unsigned long size = 0x200 + VECTORSPACING*64;
                ebase = (unsigned long)
                        __alloc_bootmem(size, 1 << fls(size), 0);
        } else {
                ebase = CAC_BASE;
                if (cpu_has_mips_r2)
                        ebase += (read_c0_ebase() & 0x3ffff000);
        }
.........................

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