| To: | Deng-Cheng Zhu <dengcheng.zhu@gmail.com> |
|---|---|
| Subject: | [BUG] The Perf support of MIPS is broken for the upstream changes |
| From: | wu zhangjin <wuzhangjin@gmail.com> |
| Date: | Thu, 4 Nov 2010 23:20:19 +0800 |
| Cc: | Ralf Baechle <ralf@linux-mips.org>, linux-mips <linux-mips@linux-mips.org> |
| Dkim-signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:date:message-id :subject:from:to:cc:content-type; bh=mRkTiy6c6468jbBa7c6gDYHXozw/zp+y1mwe1qP7Ye4=; b=j3pPc7/82aKgGnlTcjONnXWpXXTC/z1kieWjJjokxHOh6QG/OKS9ugZLwzjP+v7XCx QPLX/TXhQeXmRK9L68uJP7s6+UdNJOROMB40aUOM9xadZ+uPqCuwCkIE2X5n4YGuZY/6 +SVSnkXcmsJ2u5wPX2tjbwIjz33S4vRQS73w4= |
| Domainkey-signature: | a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:cc:content-type; b=gLCqZRXY7GGb+3GXyWz5pcqO/1LtDbBVRz92vajvCFPmUKb9P3YNKut2dHcFHJfNtS GV1w1MLYCoJljoZVa8/Z6IX1Wq99yABn+cJUkJCXp7ObsCKzwsVmqONFX3c/AhHCAEXt ncptvSBnpyVbwRwuVHy5KhUgZLMha1wQevCuw= |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| Sender: | linux-mips-bounce@linux-mips.org |
Hi, Deng Cheng
Just took a try to add the Perf support for Loongson but failed for
the skeleton of the Perf Support of MIPS was broken.
After some investigation, I have found several important changes have
been applied for the upstream Perf event, which has broken the Perf
support of MIPS.
Here lists several important changes:
1. e360adbe29241a0194e10e20595360dd7b98a2b3: irq_work: Add generic
hardirq context callbacks
This commit has added "generic hardirq context
callbacks": irq_work, which are designed particularly for NMI code that
needs to interact with the rest of the system.
Like ARM, MIPS performance counters do not raise NMI upon overflow,
instead, they emit regular interrupts, so, simply remove the empty
set_perf_event_pending() in perf_event.h and call irq_work_run() instead of
perf_event_do_pend() is needed.
2. a4eaf7f14675cb512d69f0c928055e73d0c6d252: perf: Rework the PMU methods
This has replaced the pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, which has made the current implementation
of Perf for MIPS completely broken, so, we also need to make related
changes.
3. b0a873ebbf87bf38bf70b5e39a7cadc96099fa13: perf: Register PMU implementations
The weak hw_perf_event_init() function is replaced by a new member:
event_init()
of struct pmu().
You can track more upstream changes via the following command:
$ git log {kernel/perf_event.c,include/linux/perf_event.h}
Of course, at first, you may need to clone/pull a latest mainline kernel.
Regards,
Wu Zhangjin
|
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | [PATCH] Enable AT_PLATFORM for Loongson 2F CPU, Robert Millan |
|---|---|
| Next by Date: | Re: [BUG] The Perf support of MIPS is broken for the upstream changes, Ralf Baechle |
| Previous by Thread: | [PATCH] Enable AT_PLATFORM for Loongson 2F CPU, Robert Millan |
| Next by Thread: | Re: [BUG] The Perf support of MIPS is broken for the upstream changes, Ralf Baechle |
| Indexes: | [Date] [Thread] [Top] [All Lists] |