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Re: [PATCH v3 2/2] MIPS: HIGHMEM DMA on noncoherent MIPS32 processors

To: Kevin Cernekee <cernekee@gmail.com>
Subject: Re: [PATCH v3 2/2] MIPS: HIGHMEM DMA on noncoherent MIPS32 processors
From: Nicolas Pitre <nico@fluxnic.net>
Date: Wed, 13 Oct 2010 16:32:31 -0400 (EDT)
Cc: Ralf Baechle <ralf@linux-mips.org>, Gary King <gking@nvidia.com>, dediao@cisco.com, ddaney@caviumnetworks.com, dvomlehn@cisco.com, sshtylyov@mvista.com, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
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On Wed, 13 Oct 2010, Kevin Cernekee wrote:

> On Wed, Oct 13, 2010 at 12:53 AM, Ralf Baechle <ralf@linux-mips.org> wrote:
> > It's this disabling of interrupts which I don't like.  It's easy to get
> > around it by having one kmap type for each of process, softirq and
> > interrupt context.
> 
> I am curious as to why ARM opted for the "pte push/pop" strategy
> (kmap_high_l1_vipt()) instead of something along these lines?
> 
> Is there a reason why using 3 kmap types to solve the "interrupted
> flush problem" would work for MIPS, but is not a good solution on ARM?

It would probably be a good solution for ARM as well.


Nicolas
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