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Re: [PATCH v3 2/2] MIPS: HIGHMEM DMA on noncoherent MIPS32 processors

To: Ralf Baechle <ralf@linux-mips.org>, Nicolas Pitre <nico@fluxnic.net>, Gary King <gking@nvidia.com>
Subject: Re: [PATCH v3 2/2] MIPS: HIGHMEM DMA on noncoherent MIPS32 processors
From: Kevin Cernekee <cernekee@gmail.com>
Date: Wed, 13 Oct 2010 11:01:06 -0700
Cc: dediao@cisco.com, ddaney@caviumnetworks.com, dvomlehn@cisco.com, sshtylyov@mvista.com, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
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On Wed, Oct 13, 2010 at 12:53 AM, Ralf Baechle <ralf@linux-mips.org> wrote:
> It's this disabling of interrupts which I don't like.  It's easy to get
> around it by having one kmap type for each of process, softirq and
> interrupt context.

I am curious as to why ARM opted for the "pte push/pop" strategy
(kmap_high_l1_vipt()) instead of something along these lines?

Is there a reason why using 3 kmap types to solve the "interrupted
flush problem" would work for MIPS, but is not a good solution on ARM?

> The good news is that Peter Zijlstra has rewritten kmap to make the need
> for manually allocated kmap types go away and his patches are queued to
> be merged for 2.6.37.  So I'd like to put this patch on hold until after
> his patches are merged.

OK, I'll take a look at that.  Thanks for the pointer.

> Does your system have both highmem and cache aliases?

This system has HIGHMEM + SMP, no cache aliases.

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