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[PATCH 07/14] MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Oct

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH 07/14] MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.
From: David Daney <ddaney@caviumnetworks.com>
Date: Thu, 7 Oct 2010 16:03:46 -0700
Cc: David Daney <ddaney@caviumnetworks.com>
In-reply-to: <1286492633-26885-1-git-send-email-ddaney@caviumnetworks.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1286492633-26885-1-git-send-email-ddaney@caviumnetworks.com>
Sender: linux-mips-bounce@linux-mips.org
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 .../asm/mach-cavium-octeon/cpu-feature-overrides.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h 
b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index c84ed74..0d5a42b 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -59,7 +59,7 @@
 #define cpu_has_veic           0
 #define cpu_hwrena_impl_bits   0xc0000000
 
-#define kernel_uses_smartmips_rixi (cpu_data[0].cputype == 
CPU_CAVIUM_OCTEON_PLUS)
+#define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
 
 #define ARCH_HAS_IRQ_PER_CPU   1
 #define ARCH_HAS_SPINLOCK_PREFETCH 1
-- 
1.7.2.3


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