Recently I ' m trying to initialize my own exception handler on linux
CPUs on mips64 xls416, which has 16 cores.
What I am doing now is to boot CPU 0 with smp linux 220.127.116.11, and wakeup other
CPUs into my_secondary instead of start_secondary(arch/mips/kernel/smp.c).
That is , CPU 0 will run linux idle process, and wake other cpus into
In my_secondary function, each non-zero cpu is asked to setup kuseg tlb
mapping for later use , then setup its own exception
handler at physical address cpuid*0x400, after that , ebase is set
according to the
The code is somewhat like this:
void my_secondary function()
int cpu = processor_id();
/*tlb mapping , virt start =0x600000 , phy start =0x1000000+cpuid*0x40000, */
/* These physical mapping address are reserved when booting CPU 0*/
setup_kuseg_tlb(0x600000, 0x1000000+cpu*0x40000, 0x40000);
ebase = (unsigned long)(0x80000000+cpuid*0x400);
/*exception handler install*/
memcpy((void *)(ebase + 0x180), test_except_vec_genex, 0x80);
*(unsigned long*)0x620000 = 0x1234; /*access OK*/
*(unsigned long*)0x620000 = 0x1234; /*access failed*/
As mentioned above, if the kuseg access code is put before the change of
ebase,the access of addess 0x62000 would be OK. However after the modify of
ebase, an exception would be generated if access 0x620000.
I don't know why changing ebase leads to an invalid access of kuseg section,
any suggestions? Thank you in advance.