Hi David,
I checked in the MIPS documentation and I couldn't find relevant
information about this particular way of implementation. Unfortunately
in the MIPS kernel source there are no enough comments.
Thanks,
Andrei
-----Original Message-----
From: David Daney [mailto:ddaney@caviumnetworks.com]
Sent: Wednesday, September 29, 2010 12:25 PM
To: Ardelean, Andrei
Cc: linux-mips@linux-mips.org
Subject: Re: How to setup interrupts for a new board?
On 09/29/2010 07:06 AM, Ardelean, Andrei wrote:
> Hi,
>
> I created new board specific files gd_xxxx similar with malta_xxxx and
I
> am trying to configure Linux interrupts in gd-int.c.
> My board has no external interrupt controller like Malta has, it has
no
> PCI, I use Vectored interrupt mode and a mux routes the external
> interrupts to the MIPS h/w interrupts.
> Wthat is the meaning of the following switches and how to set them:
> cpu_has_divec
> cpu_has_vce
> cpu_has_llsc
> cpu_has_counter
> cpu_has_vint
>
> What is the difference between:
> setup_irq()
> set_irq_handler()
> set_vi_handler()
>
> Can you point me to document regarding interrupts implementation in
MIPS
> Linux?
Other than the Linux Kernel source code, make sure you have a copy of:
MD00090-2B-MIPS32PRA-AFP, the "MIPS32(r) Architecture for Programmers
Volume III: The MIPS32(r) Privileged Resource Architecture"
It can be downloaded from mips.com
David Daney
>
> Thanks,
> Andrei
>
>
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