| To: | "Ardelean, Andrei" <Andrei.Ardelean@idt.com> |
|---|---|
| Subject: | Re: How to setup interrupts for a new board? |
| From: | David Daney <ddaney@caviumnetworks.com> |
| Date: | Wed, 29 Sep 2010 09:24:57 -0700 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <AEA634773855ED4CAD999FBB1A66D0760115A5BC@CORPEXCH1.na.ads.idt.com> |
| References: | <AEA634773855ED4CAD999FBB1A66D0760115A5BC@CORPEXCH1.na.ads.idt.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.11) Gecko/20100720 Fedora/3.0.6-1.fc12 Thunderbird/3.0.6 |
On 09/29/2010 07:06 AM, Ardelean, Andrei wrote: Hi, I created new board specific files gd_xxxx similar with malta_xxxx and I am trying to configure Linux interrupts in gd-int.c. My board has no external interrupt controller like Malta has, it has no PCI, I use Vectored interrupt mode and a mux routes the external interrupts to the MIPS h/w interrupts. Wthat is the meaning of the following switches and how to set them: cpu_has_divec cpu_has_vce cpu_has_llsc cpu_has_counter cpu_has_vint What is the difference between: setup_irq() set_irq_handler() set_vi_handler() Can you point me to document regarding interrupts implementation in MIPS Linux? Other than the Linux Kernel source code, make sure you have a copy of:MD00090-2B-MIPS32PRA-AFP, the "MIPS32® Architecture for Programmers Volume III: The MIPS32® Privileged Resource Architecture" It can be downloaded from mips.com David Daney Thanks, Andrei |
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