| To: | arrow zhang <arrow.ebd@gmail.com> |
|---|---|
| Subject: | Re: [Help] R3000 CPU porting, Oops while run app |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Tue, 17 Aug 2010 13:42:46 +0100 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <AANLkTikW2_NNj52goVm-h9yvHZb3e-TktmOY5jDHPpRe@mail.gmail.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <AANLkTi=bs4wJqG-3MeFJfr8sGC-s9PG_KksCY5TLo7ra@mail.gmail.com> <AANLkTikW2_NNj52goVm-h9yvHZb3e-TktmOY5jDHPpRe@mail.gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.20 (2009-12-10) |
On Tue, Aug 17, 2010 at 11:49:27AM +0800, arrow zhang wrote:
> yeah, I have known some reason on it:
> * not call "mips_cpu_irq_init" in function "arch_init_irq"
> * and did not use "set_irq_chip_and_handler"
> * before I only setup the "chip" with code "irq_desc[i].chip =
> &irq_type;", but it is for old kernel(2.6.19)
>
> so new code is:
> void __init arch_init_irq(void)
> {
> int i;
>
> mips_cpu_irq_init();
> for (i = 0; i < 32; ++i) {
> set_irq_chip_and_handler(i, &irq_type, handle_level_irq);
> }
> }
Most systems define MIPS_CPU_IRQ_BASE as 0 so be careful that your
set_irq_chip_and_handler loop doesn't overwrite any previous setup by
mips_cpu_irq_init. If your interrupt controller has 32 interrupts you
probably want to assign interrupts 0..7 to the CPU interrupts and 8..39
to the other controller.
Ralf
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