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Re: [PATCH 1/2] MIPS: MTX-1: fix PCI on the MeshCube and related boards

To: Bruno Randolf <randolf.bruno@googlemail.com>
Subject: Re: [PATCH 1/2] MIPS: MTX-1: fix PCI on the MeshCube and related boards
From: Florian Fainelli <florian@openwrt.org>
Date: Sun, 11 Jul 2010 19:10:20 +0200
Cc: linux-mips@linux-mips.org, manuel.lauss@googlemail.com, ralf@linux-mips.org
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In-reply-to: <20100711154028.29863.74414.stgit@void>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20100711154028.29863.74414.stgit@void>
Reply-to: Florian Fainelli <florian@openwrt.org>
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Le Sunday 11 July 2010 17:40:28, Bruno Randolf a écrit :
> This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1:
> Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which
> broke PCI bus operation. The problem is caused by alchemy_gpio2_enable()
> which resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are
> connected to GPIO2 and they obviously do not to like the reset. Since
> GPIO2 is correctly initialized by the boot monitor (YAMON) it is not
> necessary to call this function, so just remove it.
> 
> Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid
> problems in case gpiolib gets initialized after PCI. And since alchemy
> gpio_set_value() calls au_sync() we don't have to au_sync() again later.
> 
> Cc: stable@kernel.org
> Signed-off-by: Bruno Randolf <br1@einfach.org>

Tested-by: Florian Fainelli <florian@openwrt.org>

> ---
>  arch/mips/alchemy/mtx-1/board_setup.c |    8 +++-----
>  1 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/mips/alchemy/mtx-1/board_setup.c
> b/arch/mips/alchemy/mtx-1/board_setup.c index a9f0336..52d883d 100644
> --- a/arch/mips/alchemy/mtx-1/board_setup.c
> +++ b/arch/mips/alchemy/mtx-1/board_setup.c
> @@ -67,8 +67,6 @@ static void mtx1_power_off(void)
> 
>  void __init board_setup(void)
>  {
> -     alchemy_gpio2_enable();
> -
>  #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
>       /* Enable USB power switch */
>       alchemy_gpio_direction_output(204, 0);
> @@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
> 
>       if (assert && devsel != 0)
>               /* Suppress signal to Cardbus */
> -             gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
> +             alchemy_gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
>       else
> -             gpio_set_value(1, 1);   /* set EXT_IO3 ON */
> +             alchemy_gpio_set_value(1, 1);   /* set EXT_IO3 ON */
> 
> -     au_sync_udelay(1);
> +     udelay(1);
>       return 1;
>  }

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