| To: | loody <miloody@gmail.com> |
|---|---|
| Subject: | Re: Do I Need to enable or set l2 cache in mips for linux work |
| From: | Deng-Cheng Zhu <dengcheng.zhu@gmail.com> |
| Date: | Tue, 15 Jun 2010 08:58:47 +0800 |
| Cc: | Linux MIPS Mailing List <linux-mips@linux-mips.org> |
| Dkim-signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type; bh=QfMIHybHwk8M0gVYvfjdbndsMIelHx16LKJ/b/f/Vjo=; b=jjP7/Pbv5YT0oE5m6oOcGNVNruPkfACjUqhnJQk1iMUyZGdrDeBFVNKGe37HWaRrV0 vMrLFZffzpvgnsmp/BYNL5IZfrixGEZoqVgS/i9IukMEMrKTHIwKcDH8FHSFZortnFMg AWQ6pQ0f+jpc5uuf6XrMZwrumA8YLAOAI0jlo= |
| Domainkey-signature: | a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=Kl7Z7+qWdPUavB+9k09cx6il1KNPfwFCVoLYpOlvzOTaZpOQCz/NWlnRveGlPG484w 930vG5ouofD4ewixAmEOBbHaoNgzkNIkoH7qPw6j9DaDXQ7D2NIQuypo1fH6lByYxNQU f70WLOnlnqZE+CEScauCp3OwXUcwuB+Rki+Us= |
| In-reply-to: | <AANLkTikmXmu9uhxnk2OXuCICMpe-hdUJHaB-okhkNf3t@mail.gmail.com> |
| References: | <AANLkTikmXmu9uhxnk2OXuCICMpe-hdUJHaB-okhkNf3t@mail.gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
CONFIG_MIPS_CPU_SCACHE is the one you need to set. You may try the Perf tool located at tools/perf. For how to build the tool and patch the kernel, please refer to: http://www.linux-mips.org/archives/linux-mips/2010-06/msg00143.html BTW, raw events are suggested for your L2$ profiling. Deng-Cheng 2010/6/13 loody <miloody@gmail.com>: > Dear all: > My cpu is 24ke and are there any l2 cache configs I have to take care > of, such linux can take advantage of it. > BTW, will I can find any tool or test program for measuring the > performance of l2 cache under linux? > Appreciate your help, > miloody > > |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: [PATCH] mtd: Fix bug using smp_processor_id() in preemptible ubi_bgt1d kthread, Philby John |
|---|---|
| Next by Date: | Re: [PATCH] mtd: Fix bug using smp_processor_id() in preemptible ubi_bgt1d kthread, Philby John |
| Previous by Thread: | Do I Need to enable or set l2 cache in mips for linux work, loody |
| Next by Thread: | [PATCH] mips: Set io_map_base for several PCI bridges lacking it, Ben Hutchings |
| Indexes: | [Date] [Thread] [Top] [All Lists] |