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Re: [PATCH] MIPS: KProbes support v0.1

To: Himanshu Chauhan <hschauhan@nulltrace.org>
Subject: Re: [PATCH] MIPS: KProbes support v0.1
From: David Daney <ddaney@caviumnetworks.com>
Date: Thu, 10 Jun 2010 17:12:54 -0700
Cc: ralf@linux-mips.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org
In-reply-to: <20100608175118.GA2262@hschauhan-desktop>
References: <1275928440-21052-1-git-send-email-hschauhan@nulltrace.org> <1275928440-21052-2-git-send-email-hschauhan@nulltrace.org> <4C0D4B82.6020002@caviumnetworks.com> <20100608175118.GA2262@hschauhan-desktop>
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On 06/08/2010 10:51 AM, Himanshu Chauhan wrote:
Hi David,

Thanks for taking a look.

[...]
+
+#define BREAKPOINT_INSTRUCTION         0x0000000d
+
+/*
+ * We do not have hardware single-stepping on MIPS.
+ * So we implement software single-stepping with breakpoint
+ * trap 'break 5'.
+ */
+#define BREAKPOINT_INSTRUCTION_2       0x0000014d

The BREAK codes are defined in asm/break.h  This should be added
there instead.

Why do you use codes (0 and 5) that are already kind of reserved for
user space debuggers?

As said ealier, this patch was based on some very older patch of 2.6.16 from
Sony Corp, I didn't make much changes like this. But anyways, I wan't aware of
this either. What would be the best code then?


How about allocating them after BRK_MEMU? Say 515 and 516 or something like that.

David Daney

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