| To: | David Daney <david.s.daney@gmail.com> |
|---|---|
| Subject: | Re: [PATCH 2/9] tracing: MIPS: mcount.S: Fixup of the 32bit support with gcc 4.5 |
| From: | Wu Zhangjin <wuzhangjin@gmail.com> |
| Date: | Thu, 13 May 2010 09:35:11 +0800 |
| Cc: | Ralf Baechle <ralf@linux-mips.org>, linux-mips <linux-mips@linux-mips.org> |
| Dkim-signature: | v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=321kclP9O9qC5VvQDjIcvr0ltnh0POgtbAi5oDnxUr8=; b=C9pzJC09w//A7/GJIX8zzaZvTOE0Q6aKhCBSaL4RtRR7E+Bu2PdGjpsEpdrvfzJLUa 8/1tzOR/DkU9QA51PazAQlbbxMfFnVxq8KGA+D70faOLIvFHChit9Geh2si+R0dOHHmZ oQZY11OwvzEiAq9B2xoeejIHYUM3d0whZL5yU= |
| Domainkey-signature: | a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=k2ZJu9rE+zJ5+S4BYImLdqohfzlec9BejPCQUCE1aXIMkM2EzDHjQl/ACttd7uY2ic 58m25g0YZuw7RtzNJgzM5oMP0eAsPmCM+6pb20dwfK5xSzN3xMny1jUD8Pd6KZsX9gB2 5YFAi8bqs4lgBTemw8tpq0DpeCFieFtb5qPmk= |
| In-reply-to: | <4BEAE260.9060805@gmail.com> |
| Organization: | DSLab, Lanzhou University, China |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <cover.1273669419.git.wuzhangjin@gmail.com> <fd8a13e37a33c1075da184f4fe92b0d9afc51c09.1273669419.git.wuzhangjin@gmail.com> <4BEAE260.9060805@gmail.com> |
| Reply-to: | wuzhangjin@gmail.com |
| Sender: | linux-mips-bounce@linux-mips.org |
On Wed, 2010-05-12 at 10:16 -0700, David Daney wrote: > On 05/12/2010 06:23 AM, Wu Zhangjin wrote: > > From: Wu Zhangjin<wuzhangjin@gmail.com> > > > > As the doc[1] of gcc-4.5 shows, the -mmcount-ra-address uses register > > $12 to transfer the stack offset of the return address to the _mcount > > function. in 64bit kernel, $12 is t0, but in 32bit kernel, it is t4, so, > > we need to use $12 instead of t0 here to cover the 64bit and 32bit > > support. > > > > [1] Gcc doc: MIPS Options > > http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html > > > > Signed-off-by: Wu Zhangjin<wuzhangjin@gmail.com> > > Would it be better to do?: > > #define MCOUNT_RA_ADDRESS_REG $12 > > s/t0/MCOUNT_RA_ADDRESS_REG/g Good idea, will change it later. Regards, Wu Zhangjin |
| Previous by Date: | RE: [PATCH resend] Apply kmap_high_get on MIPS, Dezhong Diao (dediao) |
|---|---|
| Next by Date: | Re: [PATCH 9/9] tracing: MIPS: cleanup of the address space checking, Wu Zhangjin |
| Previous by Thread: | Re: [PATCH 2/9] tracing: MIPS: mcount.S: Fixup of the 32bit support with gcc 4.5, David Daney |
| Next by Thread: | [PATCH 4/9] tracing: MIPS: mcount.S: cleanup of the comments, Wu Zhangjin |
| Indexes: | [Date] [Thread] [Top] [All Lists] |