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[PATCH 4/5] Oprofile: Loongson: Cleanup of the macros

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 4/5] Oprofile: Loongson: Cleanup of the macros
From: Wu Zhangjin <wuzhangjin@gmail.com>
Date: Fri, 7 May 2010 01:29:47 +0800
Cc: linux-mips@linux-mips.org, Wu Zhangjin <wuzhangjin@gmail.com>
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Sender: linux-mips-bounce@linux-mips.org
From: Wu Zhangjin <wuzhangjin@gmail.com>

The _EXL, _KERNEL ... bits are in the performance control register, so,
use _PERFCTRL prefix instead of _PERFCNT. BTW: to make the macro
readable, use _ENABLE instead of _INT_EN to describe the interrupt
enable bit.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/oprofile/op_model_loongson2.c |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/mips/oprofile/op_model_loongson2.c 
b/arch/mips/oprofile/op_model_loongson2.c
index a03894e..23f7e13 100644
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -24,16 +24,16 @@
  */
 #define LOONGSON2_CPU_TYPE     "mips/loongson2"
 
+#define LOONGSON2_PERFCNT_OVERFLOW             (1ULL   << 31)
+
+#define LOONGSON2_PERFCTRL_EXL                 (1UL    <<  0)
+#define LOONGSON2_PERFCTRL_KERNEL              (1UL    <<  1)
+#define LOONGSON2_PERFCTRL_SUPERVISOR          (1UL    <<  2)
+#define LOONGSON2_PERFCTRL_USER                        (1UL    <<  3)
+#define LOONGSON2_PERFCTRL_ENABLE              (1UL    <<  4)
 #define LOONGSON2_PERFCTRL_EVENT(idx, event) \
        (((event) & 0x0f) << ((idx) ? 9 : 5))
 
-#define LOONGSON2_PERFCNT_EXL                  (1UL    <<  0)
-#define LOONGSON2_PERFCNT_KERNEL               (1UL    <<  1)
-#define LOONGSON2_PERFCNT_SUPERVISOR   (1UL    <<  2)
-#define LOONGSON2_PERFCNT_USER                 (1UL    <<  3)
-#define LOONGSON2_PERFCNT_INT_EN               (1UL    <<  4)
-#define LOONGSON2_PERFCNT_OVERFLOW             (1ULL   << 31)
-
 /* Loongson2 performance counter register */
 #define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
 #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
@@ -76,11 +76,11 @@ static void loongson2_reg_setup(struct op_counter_config 
*cfg)
        }
 
        if (cfg[0].enabled || cfg[1].enabled) {
-               ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN;
+               ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE;
                if (cfg[0].kernel || cfg[1].kernel)
-                       ctrl |= LOONGSON2_PERFCNT_KERNEL;
+                       ctrl |= LOONGSON2_PERFCTRL_KERNEL;
                if (cfg[0].user || cfg[1].user)
-                       ctrl |= LOONGSON2_PERFCNT_USER;
+                       ctrl |= LOONGSON2_PERFCTRL_USER;
        }
 
        reg.ctrl = ctrl;
@@ -125,7 +125,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, 
void *dev_id)
         */
 
        /* Check whether the irq belongs to me */
-       enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN;
+       enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
        if (!enabled)
                return IRQ_NONE;
        enabled = reg.cnt1_enabled | reg.cnt2_enabled;
-- 
1.7.0


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