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Re: Unexpected behaviour when catching SIGFPE on FPU-less system

To: Shane McDonald <mcdonald.shane@gmail.com>
Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system
From: "Kevin D. Kissell" <kevink@paralogos.com>
Date: Tue, 04 May 2010 09:13:18 -0700
Cc: linux-mips@linux-mips.org
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Shane McDonald wrote:
>
> In the following chunk of code from cp1emu.c:
>   
[snip]
> value gets set to an initial value of 0x400, and ctx->fcr31
> comes in with an initial value of 0x8420.
> By the time we hit the if statement around the return SIGFPE, ctx->fcr31
> has been set to 0x8400, not the 0x400 I implied.
>   
Ah, well that would rather change things, and you *would* get an
exception there.  As written, the code doesn't seem to allow the pending
exception (.._X) bits to be cleared by the CTC.
> Nevertheless, that's not the problem.  
Maybe it is.  I don't have my MIPS specs handy anymore, but just what is
supposed to clear a pending exception bit in a real FPU?
> You've given me some good pointers
> for where to begin searching for the problem.
>
> If anyone out there has a verification suite they can run on the emulator,
> that would be much appreciated!
>   
What we used to use was what I *thought* was an old public domain
program whose name was an English word that had something to do with
being exacting.  Googling with obvious keywords didn't turn it up.

          Regards,

          Kevin K.


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