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Re: [PATCH] MIPS: Calculate proper ebase value for 64-bit kernels

To: Wu Zhangjin <wuzhangjin@gmail.com>
Subject: Re: [PATCH] MIPS: Calculate proper ebase value for 64-bit kernels
From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Date: Tue, 13 Apr 2010 09:34:38 +0200
Cc: David Daney <ddaney@caviumnetworks.com>, linux-mips@linux-mips.org, ralf@linux-mips.org
In-reply-to: <1271135034.25797.41.camel@falcon>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1270585790-12730-1-git-send-email-ddaney@caviumnetworks.com> <1271135034.25797.41.camel@falcon>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.18 (2008-05-17)
On Tue, Apr 13, 2010 at 01:03:54PM +0800, Wu Zhangjin wrote:
> This patch have broken the support to the MIPS variants whose
> cpu_has_mips_r2 is 0 for the CAC_BASE and CKSEG0 is completely different
> in these MIPSs.

I've checked R4k and R10k manulas and the exception base is at CKSEG0, so
about CPU we are talking ? And wouldn't it make for senso to have
an extra define for the exception base then ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

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