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Re: [PATCH v2 1/3] MIPS: add a common mips_cyc2ns()

To: David Daney <ddaney@caviumnetworks.com>
Subject: Re: [PATCH v2 1/3] MIPS: add a common mips_cyc2ns()
From: Wu Zhangjin <wuzhangjin@gmail.com>
Date: Thu, 08 Apr 2010 17:36:15 +0800
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org, Ralf Rösch <roesch.ralf@web.de>
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On Wed, 2010-04-07 at 09:48 -0700, David Daney wrote:
[...]
> >   arch/mips/include/asm/time.h |   38 ++++++++++++++++++++++++++++++++++++++
> >   1 files changed, 38 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
> > index c7f1bfe..898f0e0 100644
> > --- a/arch/mips/include/asm/time.h
> > +++ b/arch/mips/include/asm/time.h
> > @@ -96,4 +96,42 @@ static inline void clockevent_set_clock(struct 
> > clock_event_device *cd,
> >     clockevents_calc_mult_shift(cd, clock, 4);
> >   }
> >
> > +static inline unsigned long long mips_cyc2ns(u64 cyc, u64 mult, u64 shift)
> > +{
> > +#ifdef CONFIG_32BIT
> > +   /*
> > +    * To balance the overhead of 128bit-arithematic and the precision
> > +    * lost, we choose a smaller shift to avoid the quick overflow as the
> > +    * X86&  ARM does. please refer to arch/x86/kernel/tsc.c and
> > +    * arch/arm/plat-orion/time.c
> > +    */
> > +   return (cyc * mult)>>  shift;
> > +#else /* CONFIG_64BIT */
> > +   /* 64-bit arithmatic can overflow, so use 128-bit.  */
> > +#if (__GNUC__<  4) || ((__GNUC__ == 4)&&  (__GNUC_MINOR__<= 3))
> > +   u64 t1, t2, t3;
> > +   unsigned long long rv;
> > +
> > +   asm (
> > +           "dmultu\t%[cyc],%[mult]\n\t"
> > +           "nor\t%[t1],$0,%[shift]\n\t"
> > +           "mfhi\t%[t2]\n\t"
> > +           "mflo\t%[t3]\n\t"
> > +           "dsll\t%[t2],%[t2],1\n\t"
> > +           "dsrlv\t%[rv],%[t3],%[shift]\n\t"
> > +           "dsllv\t%[t1],%[t2],%[t1]\n\t"
> > +           "or\t%[rv],%[t1],%[rv]\n\t"
> > +           : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" 
> > (t3)
> > +           : [cyc] "r" (cyc), [mult] "r" (mult), [shift] "r" (shift)
> > +           : "hi", "lo");
> > +   return rv;
> > +#else      /* GCC>  4.3 do it the easy way.  */
> > +   unsigned int __attribute__((mode(TI))) t = cyc;
> > +
> > +   t = (t * mult)>>  shift;
> > +   return (unsigned long long)t;
> > +#endif
> > +#endif /* CONFIG_64BIT */
> > +}
> > +
> >   #endif /* _ASM_TIME_H */
> 
> It turns out that all GCC versions can handle the inline asm way.  It 
> has also been noted that the default Debian compiler somehow has 
> problems with the 'easy way'.
> 
> Therefore, I would recommend gitting rid of the GCC version conditionals 
> and just leave the inline asm.

Ok, will only reserve the asm way in the next revision, thanks!

Regards,
        Wu Zhangjin


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