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data consistency of high page

To: Ralf Baechle <ralf@linux-mips.org>
Subject: data consistency of high page
From: Minchan Kim <minchan.kim@gmail.com>
Date: Tue, 23 Mar 2010 17:46:52 +0900
Cc: lkml <linux-kernel@vger.kernel.org>, linux-mips <linux-mips@linux-mips.org>, Namjae Jeon <linkinjeon@gmail.com>
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Hi, Ralf.

Below is thread long time ago.
At that time, we can't end up the problem by some reason.
Sorry for that.

The problem would occur, again.

On Fri, Oct 16, 2009 at 6:24 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Fri, Oct 16, 2009 at 02:17:19PM +0900, Minchan Kim wrote:
>
>> Many code of kernel fs usually allocate high page and flush.
>> But flush_dcache_page of mips checks PageHighMem to avoid flush
>> so that data consistency is broken, I think.
>
> What processor and cache configuration?
>
>> I found it's by you and Atsushi-san on 585fa724.
>> Why do we need the check?
>> Could you elaborte please?
>
> The if statement exists because __flush_dcache_page would crash if a page
> is not mapped.  This of course isn't correct but that wasn't a problem
> since highmem still is only supported on machines that don't have aliases.
>
>  Ralf
>

Our system is following as.

mips 34ke
primary i-cache 32kB VIPT 4way 32 byte line size.
primary d-cache 32kB 4way  32 bytes linesize

If you have further questions, Namjae, Could you follow question of Ralf?

-- 
Kind regards,
Minchan Kim

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