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Re: [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus

To: Yang Shi <yang.shi@windriver.com>
Subject: Re: [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 16 Mar 2010 19:09:46 +0100
Cc: ddaney@caviumnetworks.com, ben-linux@fluff.org, khali@linux-fr.org, linux-mips@linux-mips.org, linux-i2c@vger.kernel.org
In-reply-to: <1268026190-18300-1-git-send-email-yang.shi@windriver.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1268026190-18300-1-git-send-email-yang.shi@windriver.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.20 (2009-08-17)
On Mon, Mar 08, 2010 at 01:29:50PM +0800, Yang Shi wrote:

> An SPD resides on 0x50 of the I2C bus on CN56xx/57xx board,
> register this device.

I wonder what the use case for this patch is?  Normally Linux doesn't care
about SPD.

I also wonder how this will work for configurations with multiple memory
modules thus multiple SPD EEPROMS.

  Ralf

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