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Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such as BTB

To: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such as BTB and RAS
From: Ralf Baechle <ralf@linux-mips.org>
Date: Thu, 11 Mar 2010 10:59:44 +0100
Cc: Wu Zhangjin <wuzhangjin@gmail.com>, Greg KH <gregkh@suse.de>, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
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On Thu, Mar 11, 2010 at 12:27:42PM +0900, Shinya Kuribayashi wrote:

> Are you sure that RAS represents "Row Address Strobe", not "Return
> Address Stack?"
> 
> By the way, we have a similar local workaround for vr55xx processors
> when switching from kernel mode to user mode.  It's not necessarily
> related to out-of-order issues, but we need to prevent the processor
> from doing instruction prefetch beyond "eret" instruction.

Some R4000 revisions may do silly things in case of an NMI where c0_errorepc
is pointing is pointing to an ERET instruction.

There are various processors which want to save and restore core-specific
registers, for example the Cavium cnMIPS core.

> In the long term, it would be appreciated that the kernel has a set
> of hooks when switching KUX-modes, so that each machine could have
> his own, processor-specific treatmens.

It seems that uasm is the tool of choice.

  Ralf

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