| To: | David Daney <ddaney@caviumnetworks.com> |
|---|---|
| Subject: | Re: [PATCH -queue 1/3] MIPS: add a common mips_sched_clock() |
| From: | Wu Zhangjin <wuzhangjin@gmail.com> |
| Date: | Sat, 27 Feb 2010 01:35:24 +0800 |
| Cc: | Ralf Baechle <ralf@linux-mips.org>, "linux-mips@linux-mips.org" <linux-mips@linux-mips.org> |
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| In-reply-to: | <4B670A45.3010105@caviumnetworks.com> |
| Organization: | DSLab, Lanzhou University, China |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <198fc72d92823547c9be132616fd2ebc2091ff39.1265022593.git.wuzhangjin@gmail.com> <4B670A45.3010105@caviumnetworks.com> |
| Reply-to: | wuzhangjin@gmail.com |
| Sender: | linux-mips-bounce@linux-mips.org |
On Mon, 2010-02-01 at 09:07 -0800, David Daney wrote:
> Wu Zhangjin wrote:
>
> > + "dmultu\t%[cnt],%[mult]\n\t"
> > + "nor\t%[t1],$0,%[shift]\n\t"
> > + "mfhi\t%[t2]\n\t"
> > + "mflo\t%[t3]\n\t"
> > + "dsll\t%[t2],%[t2],1\n\t"
> > + "dsrlv\t%[rv],%[t3],%[shift]\n\t"
> > + "dsllv\t%[t1],%[t2],%[t1]\n\t"
>
> This is unlikely to work in 32-bit kernels.
So, before the 32-bit version is out, can we make it depends on
CONFIG_64BIT?
Thanks & Regards,
Wu Zhangjin
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