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Re: RFC: [MIPS] BCM1480/BCM1480HT remove io_offset

To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: Re: RFC: [MIPS] BCM1480/BCM1480HT remove io_offset
From: Bjorn Helgaas <bjorn.helgaas@hp.com>
Date: Wed, 24 Feb 2010 20:45:02 -0700
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <201002241630.42987.bjorn.helgaas@hp.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <201002241338.41501.bjorn.helgaas@hp.com> <20100224221053.GB20280@alpha.franken.de> <201002241630.42987.bjorn.helgaas@hp.com>
Sender: linux-mips-bounce@linux-mips.org
On Wed, 2010-02-24 at 16:30 -0700, Bjorn Helgaas wrote:
> Are there registers to control the CPU-to-PCI address translation, or
> is it just fixed at:
> 
>   PCI ioport = CPU addr - 0x2C000000 (for BCM1480) and
>   PCI ioport = CPU addr - 0xDC000000 (for BCM1480HT)?
> 
> If you can control the translation, you could define nice CPU-side
> I/O port ranges like we do on ia64, e.g.,
> 
>   [0x0000000-0x0ffffff] for BCM1480
>   [0x1000000-0x1ffffff] for BCM1480HT
> 
> That would also allow you to make inb() and friends work on both
> hoses by replacing "mips_io_port_base + port" with something like
> __ia64_mk_io_addr().
> 
> I guess you could do the same thing even if you can't control the
> translation, but the ranges would be a little uglier because they
> both have to be relative to the same base, e.g.,
> 
>   [0x0000000-0x0ffffff] for BCM1480
>   [0xb000000-0xbffffff] for BCM1480HT

Actually, you should be able to make this work with CPU I/O resources of
your choice even if you can't control the translation.  It just requires
a little more indirection, like most computer science problems :-)  On
ia64, we map multiple I/O port spaces with arbitrary translations into a
0xSPPPPPP scheme (S = space number, PPPPPP = port number).

But my main concern is just making sure that my IORESOURCE_PCI_FIXED
change didn't break BCM1480, and I don't think it will.

Bjorn



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