| To: | Sergei Shtylyov <sshtylyov@mvista.com> |
|---|---|
| Subject: | Re: [PATCH 3/4] MIPS: Add TLBP to uasm. |
| From: | David Daney <ddaney@caviumnetworks.com> |
| Date: | Mon, 08 Feb 2010 09:19:41 -0800 |
| Cc: | linux-mips@linux-mips.org, ralf@linux-mips.org |
| In-reply-to: | <4B6FEE4A.6090504@ru.mvista.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <4B6CA90C.1000609@caviumnetworks.com> <1265412431-28526-3-git-send-email-ddaney@caviumnetworks.com> <4B6FEE4A.6090504@ru.mvista.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Thunderbird 2.0.0.21 (X11/20090320) |
Sergei Shtylyov wrote: Hello. David Daney wrote:The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBPBut you're adding TLBR support, not TLBP? Right. I am making more changes to this patch set and will correct that. Thanks, David Daney |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: VMALLOC_END, TASK_SIZE and FIXADDR_START for 64 bit MIPS kernels, Ralf Baechle |
|---|---|
| Next by Date: | [PATCH] MIPS: Don't probe reserved EntryHi bits., David Daney |
| Previous by Thread: | Re: [PATCH 3/4] MIPS: Add TLBP to uasm., Sergei Shtylyov |
| Next by Thread: | [PATCH 2/4] MIPS: Add accessor functions and bit definitions for c0_PageGrain, David Daney |
| Indexes: | [Date] [Thread] [Top] [All Lists] |