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Re: [PATCH 3/3] MIPS: deal with larger physical offsets

To: Florian Fainelli <florian@openwrt.org>
Subject: Re: [PATCH 3/3] MIPS: deal with larger physical offsets
From: Maxime Bizon <mbizon@freebox.fr>
Date: Sat, 30 Jan 2010 16:58:15 +0100
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>, David Daney <ddaney@caviumnetworks.com>
In-reply-to: <201001281522.37939.florian@openwrt.org>
Organization: Freebox
References: <201001281522.37939.florian@openwrt.org>
Reply-to: mbizon@freebox.fr
Sender: linux-mips-bounce@linux-mips.org
On Thu, 2010-01-28 at 15:22 +0100, Florian Fainelli wrote:

Hi,

>       if (n == 0 && cpu_has_divec) {
> -             *(u32 *)(ebase + 0x200) = 0x08000000 |
> -                                       (0x03ffffff & (handler >> 2));
> -             local_flush_icache_range(ebase + 0x200, ebase + 0x204);
> +             unsigned long jump_mask = ~((1 << 28) - 1);
> +             u32 *buf = (u32 *)(ebase + 0x200);
> +             unsigned int k0 = 26;
> +             if((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) {
> +                     uasm_i_j(&buf, handler & jump_mask);
> +                     uasm_i_nop(&buf);

This results in "Micro-assembler field overflow" on my board.

jump_mask is 0xf0000000, so I guess you meant:

-                       uasm_i_j(&buf, handler & jump_mask);
+                       uasm_i_j(&buf, handler & ~jump_mask);


And by the way, shouldn't jump_mask be 0xfc000000 ?

-- 
Maxime



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