Re: [PATCH] powertv: Fix support for timer interrupts when using >64 external IRQs

[David VomLehn <dvomlehn@cisco.com>]

On Tue, Jan 26, 2010 at 08:26:14AM -0600, Ralf Baechle wrote:
> On Mon, Dec 21, 2009 at 05:49:22PM -0800, David VomLehn wrote:
> 
> > The MIPS processor is limited to 64 external interrupt sources. Using a
> > greater number without IRQ sharing requires reading platform-specific
> > registers. On such platforms, reading the IntCtl register to determine
> > which interrupt corresponds to a timer interrupt will not work.
> > 
> > On MIPSR2 systems there is a solution--the TI bit in the Cause register,
> > specifically indicates that a timer interrupt has occured. This patch
> > uses that bit to detect interrupts for MIPSR2 processors, which may be
> > expected to work regardless of how the timer interrupt may be routed
> > in the hardware.
> 
> I think this isn't relevant for any currently in-tree supported platforms (?)
> so I've queued this for 2.6.34.
> 
> Thanks,
> 
>   Ralf

It's required for the PowerTV platform, but the release that includes it
is at your discretion.
-- 
David VL