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Re: [PATCH] powertv: Fix support for timer interrupts when using >64 ext

To: David VomLehn <dvomlehn@cisco.com>
Subject: Re: [PATCH] powertv: Fix support for timer interrupts when using >64 external IRQs
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 26 Jan 2010 15:26:14 +0100
Cc: linux-mips@linux-mips.org
In-reply-to: <20091222014922.GA30164@dvomlehn-lnx2.corp.sa.net>
References: <20091222014922.GA30164@dvomlehn-lnx2.corp.sa.net>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.20 (2009-08-17)
On Mon, Dec 21, 2009 at 05:49:22PM -0800, David VomLehn wrote:

> The MIPS processor is limited to 64 external interrupt sources. Using a
> greater number without IRQ sharing requires reading platform-specific
> registers. On such platforms, reading the IntCtl register to determine
> which interrupt corresponds to a timer interrupt will not work.
> 
> On MIPSR2 systems there is a solution--the TI bit in the Cause register,
> specifically indicates that a timer interrupt has occured. This patch
> uses that bit to detect interrupts for MIPSR2 processors, which may be
> expected to work regardless of how the timer interrupt may be routed
> in the hardware.

I think this isn't relevant for any currently in-tree supported platforms (?)
so I've queued this for 2.6.34.

Thanks,

  Ralf

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