| To: | "wilbur.chan" <wilbur512@gmail.com> |
|---|---|
| Subject: | Re: Is it possible to reset non-zero cpus in kernel? |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Wed, 25 Nov 2009 15:42:02 +0000 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <e997b7420911250712n3380225racdaad413c5b0b53@mail.gmail.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <e997b7420911250712n3380225racdaad413c5b0b53@mail.gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.19 (2009-01-05) |
On Wed, Nov 25, 2009 at 11:12:07PM +0800, wilbur.chan wrote: > Does anyone here has ever used a mips XLR machine? > > > Though xlr arch is not supported by kernel source tree, I hope there > might be someone using xlr on this maillst ,plz help. And I hope RMI / Netlogic will change their mind on this ... > In a mips64 arch, is it possible to reset all the cores ,except for > NO.0 core , into the 'msgwait' state? The MIPS64 architecture specification doesn't cover how to trigger a reset signal to a processor. Iow this is system specific; check the XLR documentation. Ralf |
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