Hi Arnaud,
this is an age-old "feature", still resistent to all the patches, which
tried to change it since ;-)
from MIPS git-head:
SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
unsigned int, cache)
{
if (bytes == 0)
return 0;
if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
return -EFAULT;
flush_icache_range(addr, addr + bytes);
return 0;
}
DCACHE as well as BCACHE are silently taken as ICACHE (You have to fix
your local copy of the kernel source, and you are not alone with this
problem: anyone who wants to run the Xserver on IP28 has to do)
kind regards
peter
On Wed, 25 Nov 2009, Arnaud Patard wrote:
> Date: Wed, 25 Nov 2009 15:48:16 +0100
> From: Arnaud Patard <arnaud.patard@rtp-net.org>
> To: Florian Lohoff <flo@rfc822.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>, linux-mips@linux-mips.org
> Subject: Re: Syncing CPU caches from userland on MIPS
>
> Florian Lohoff <flo@rfc822.org> writes:
>
> > On Wed, Nov 25, 2009 at 03:39:01PM +0100, Arnaud Patard wrote:
> >> > Would this only evict stuff from the ICACHE? When trying to execute
> >> > a just written buffer and with a writeback DCACHE you would need to
> >> > explicitly writeback the DCACHE to memory and invalidate the ICACHE.
> >>
> >> we already though about using BCACHE instead of ICACHE only but it
> >> didn't make any difference. the bug is still there.
> >
> > My understanding is you need both ...
> >
> > FLUSH/WRITEBACK the dcache and INVALIDATE the icache - the icache needs
> > to load the data which is in the dcache via memory.
>
> I undertstood that using BCACHE would be better but still, it doesn't
> solve our issue. Can we please go ahead ? :)
>
> Arnaud
>
>
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