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Re: Syncing CPU caches from userland on MIPS

To: Florian Lohoff <flo@rfc822.org>
Subject: Re: Syncing CPU caches from userland on MIPS
From: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Date: Wed, 25 Nov 2009 15:48:16 +0100
Cc: Aurelien Jarno <aurelien@aurel32.net>, linux-mips@linux-mips.org
In-reply-to: <20091125143232.GH13938@paradigm.rfc822.org> (Florian Lohoff's message of "Wed\, 25 Nov 2009 15\:32\:32 +0100")
Organization: RtpNet
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20091124182841.GE17477@hall.aurel32.net> <20091125140105.GB13938@paradigm.rfc822.org> <87pr76acu2.fsf@lechat.rtp-net.org> <20091125143232.GH13938@paradigm.rfc822.org>
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Florian Lohoff <flo@rfc822.org> writes:

> On Wed, Nov 25, 2009 at 03:39:01PM +0100, Arnaud Patard wrote:
>> > Would this only evict stuff from the ICACHE? When trying to execute
>> > a just written buffer and with a writeback DCACHE you would need to 
>> > explicitly writeback the DCACHE to memory and invalidate the ICACHE.
>> 
>> we already though about using BCACHE instead of ICACHE only but it
>> didn't make any difference. the bug is still there.
>
> My understanding is you need both ...
>
> FLUSH/WRITEBACK the dcache and INVALIDATE the icache - the icache needs
> to load the data which is in the dcache via memory.

I undertstood that using BCACHE would be better but still, it doesn't
solve our issue. Can we please go ahead ? :)

Arnaud

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